 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MPV5 Series 9x14 mm, 5.0 Volt, PECL, VCXO * LVDS and PECL Output Logic With Good Integrated Jitter Performance (5 ps) * Phase-Locked Loops (PLL's), Clock Recovery, Reference Signal Tracking, Synthesizers, Frequency Modulation/ Demodulation OBSOLETE Pin Connections 22 MPV5 Series 9x14 mm, 5.0 Volt, PECL, VCXO OBSOLETE V C X O 1. 2. 3. 4. Frequencies above 70 MHz utilize a PLL design. Fundamental and PLL designs are available for other frequencies. Contact factory. Stability is given for deviation over temperature. PECL load - see load circuit diagram #3 on page 148. APR specification inclusive of initial tolerance, deviation over temperature, shock, vibration, supply voltage, and aging. 23 |
Price & Availability of MPV580Z8QJ
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |